Lib.rs

› Hardware support › RustHDL
#high-level-synthesis #fpga #verilog #hardware

rust-hdl-hls

by Samit Basu and 3 contributors

4 releases (2 breaking)

0.46.0 Jul 2, 2023
0.45.1 Apr 4, 2023
0.45.0 Apr 1, 2023
0.44.2 Mar 25, 2023

#1949 in Hardware support

Download history 12/week @ 2024-06-29 20/week @ 2024-07-06 33/week @ 2024-07-13 12/week @ 2024-07-20 50/week @ 2024-07-27 29/week @ 2024-08-03 17/week @ 2024-08-10 11/week @ 2024-08-17 17/week @ 2024-08-24 18/week @ 2024-08-31 19/week @ 2024-09-07 19/week @ 2024-09-14 46/week @ 2024-09-21 42/week @ 2024-09-28 4/week @ 2024-10-05 17/week @ 2024-10-12

111 downloads per month
Used in 13 crates (3 directly)

MIT and AGPL-3.0-only

580KB
14K SLoC

Write firmware for FPGAs in Rust - High Level Synthesis crate

Dependencies

~8.5MB
~151K SLoC