8 releases
| 0.3.0 | Apr 27, 2020 |
|---|---|
| 0.2.3 | May 20, 2019 |
| 0.2.0 | Apr 15, 2019 |
| 0.1.2 | Apr 5, 2019 |
#1028 in Hardware support
16KB
354 lines
risky
RISC-V instruction encoding library. The following instruction sets are implemented at the moment:
- RV32I base instruction set
- RV32M standard extension
No compressed 16-bit instructions yet. The library is in its early days, so there is more to come.
The code is based on the official RISC-V documentation:
“The RISC-V Instruction Set Manual, Volume I: User-Level ISA, Document Version 2.2”, Editors Andrew Waterman and Krste Asanović, RISC-V Foundation, May 2017. https://riscv.org/specifications/