Lib.rs

› Hardware support
#intel #acceleration #storage #intelligent #api-bindings

isa-l

Idiomatic bindings to libisal, the Intel(R) Intelligent Storage Acceleration Library

by Kevin Schibli

4 releases

0.2.0 Jun 25, 2020
0.1.2 Mar 5, 2020
0.1.1 Mar 3, 2020
0.1.0 Mar 2, 2020

#1442 in Hardware support


Used in isa-l-erasure-coder

BSD-3-Clause

3MB
72K SLoC

C 32K SLoC // 0.1% comments Assembly 30K SLoC // 0.2% comments GNU Style Assembly 8K SLoC // 0.1% comments Rust 830 SLoC // 0.0% comments Shell 804 SLoC // 0.1% comments Automake 532 SLoC // 0.4% comments Bitbake 256 SLoC // 0.2% comments

isa-l-rs

Rust bindings to libisal, the Intel(R) Intelligent Storage Acceleration Library

Currently only bindings for Erasure codes are implemented. CRC, Raid, Compression and De-compression might follow later (PRs welcome).

Usage

# Cargo.toml
[dependencies]
isa-l = "0.1"

Building

Dynamic linking to libisal >= 2.14.1 is attempted otherwise it is built from source. Building from source requires nasm or yasm (See https://github.com/intel/isa-l#prerequisites).

Updating libisal-sys bindings

To update the bindings we use bindgen and update the resulting bindings manually:

  • Install bindgen: 
    $ cargo install bindgen
  • Install the new version of libisal on the system.
  • Enter the tools directory: 
    $ cd tools
  • Review wrapper.h and bindgen.sh
  • Generate the new bindings 
    $ ./bindgen.sh > ../libisal-sys/lib.bindgen.rs
  • Merge with old bindings, check docs, update / add tests 
    $ vimdiff ../libisal-sys/lib.bindgen.rs ../libisal-sys/lib.rs

Dependencies