#hdl #hardware #fpga #firrtl #semiconductor

fayalite-visit-gen

an implementation detail of fayalite -- Visit/Fold implementation generator

2 unstable releases

0.2.0 Oct 18, 2024
0.1.0 Jul 26, 2024

#58 in Simulation


Used in fayalite

LGPL-3.0-or-later

36KB
963 lines

Fayalite

Fayalite is a library for designing digital hardware -- a hardware description language (HDL) embedded in the Rust programming language. Fayalite's semantics are based on FIRRTL as interpreted by LLVM CIRCT.

Dependencies

~1.6–2.7MB
~54K SLoC