Cargo Features
esp-hal-common has no features set by default.
[dependencies]
esp-hal-common = { version = "0.15.0", features = ["esp32", "esp32c2", "esp32c3", "esp32c6", "esp32h2", "esp32s2", "esp32s3", "xtal-26mhz", "xtal-40mhz", "rt-riscv", "rt-xtensa", "flip-link", "psram-2m", "psram-8m", "opsram-2m", "opsram-16m", "psram-80mhz", "usb-otg", "direct-vectoring", "interrupt-preemption", "vectored", "log", "eh1", "embedded-io", "ufmt", "async", "embassy", "embassy-executor-interrupt", "embassy-executor-thread", "embassy-integrated-timers", "embassy-time-timg0", "riscv", "xtensa", "rv-init-data", "rv-zero-rtc-bss", "rv-init-rtc-data", "debug", "defmt"] }
- esp32 = xtensa
-
Enables esp32 ^0.28.0
IMPORTANT:
Each supported device MUST have its PAC included below along with a corresponding feature.and esp32 of esp-hal-procmacros ^0.8.0, xtensa-lx ^0.8.0, and optional xtensa-lx-rt ^0.16.0
xtensa-lx:
Xtensa
- esp32c2 = riscv
-
Enables esp32c2 ^0.17.0, unsafe-assume-single-core of portable-atomic, esp32c2 of esp-hal-procmacros ^0.8.0
- esp32c3 = riscv
-
Enables esp32c3 ^0.20.0, esp32c3 of esp-hal-procmacros ^0.8.0 and unsafe-assume-single-core of portable-atomic
portable-atomic:
Assume the target is single core, to enable implementations based on disabling interrupts. IMPORTANT: This feature is unsafe. See the documentation for the safety contract: https://github.com/taiki-e/portable-atomic#optional-features-unsafe-assume-single-core
- esp32c6 = riscv
-
Enables esp32c6 ^0.11.0, esp32c6 of esp-hal-procmacros ^0.8.0
- esp32h2 = riscv
-
Enables esp32h2 ^0.7.0, esp32h2 of esp-hal-procmacros ^0.8.0
- esp32s2 = usb-otg, xtensa
-
Enables esp32s2 ^0.19.0, critical-section of portable-atomic, esp32s2 of esp-hal-procmacros ^0.8.0, xtensa-lx ^0.8.0, and optional xtensa-lx-rt ^0.16.0
- esp32s3 = usb-otg, xtensa
-
Enables esp32s3 ^0.23.0, esp32s3 of esp-hal-procmacros ^0.8.0, xtensa-lx ^0.8.0, and optional xtensa-lx-rt ^0.16.0
- xtal-26mhz
-
Crystal frequency selection (ESP32 and ESP32-C2 only!)
- xtal-40mhz
- rt-riscv
-
Runetime support
Enables zero-bss of esp-riscv-rt ^0.6.1, rt of optional esp32c2 ^0.17.0, optional esp32c3 ^0.20.0, optional esp32c6 ^0.11.0, and optional esp32h2 ^0.7.0
Affects
esp-hal-common::interrupt
,esp-hal-common::trapframe
… - rt-xtensa
-
Enables xtensa-lx-rt ^0.16.0, rt of optional esp32 ^0.28.0, optional esp32s2 ^0.19.0, and optional esp32s3 ^0.23.0
Affects
esp32::ESP32Reset
,esp32s2::ESP32Reset
,esp32s3::configure_cpu_caches
,esp32s3::ESP32Reset
,esp-hal-common::interrupt
,esp-hal-common::trapframe
… - flip-link
-
Only certain chips support flip-link (ESP32-C6 and ESPS32-H2)
Enables fix-sp of esp-riscv-rt ^0.6.1
- psram-2m
-
PSRAM support
Affects
psram::init_psram
,psram::init_psram
,psram::init_psram
… - psram-4m psram-8m
-
Affects
psram::init_psram
,psram::init_psram
,psram::init_psram
… - opsram-2m
-
Octal RAM support
Affects
psram::init_psram
… - opsram-4m opsram-8m opsram-16m
-
Affects
psram::init_psram
… - psram-80mhz
-
PSRAM 80Mhz frequency support
- usb-otg esp32s2? esp32s3? = esp-synopsys-usb-otg, usb-device
-
USB OTG support (ESP32-S2 and ESP32-S3 only! Enabled by default)
- direct-vectoring
-
Interrupt-related feature:
- Use direct interrupt vectoring (RISC-V only!)
- Use interrupt preemption (RISC-V only!)
- Use vectored interrupts (calling the handlers defined in the PAC)Enables direct-vectoring of esp-riscv-rt ^0.6.1
- interrupt-preemption
-
Enables interrupt-preemption of esp-riscv-rt ^0.6.1
- vectored
-
Enables interrupt of esp-hal-procmacros ^0.8.0
esp-hal-procmacros:
Provide an
#[interrupt]
procmacro for defining interrupt service routines. - log
-
Enable logging
Enables log
- eh1 async? = embedded-can, embedded-hal-1, embedded-hal-nb
-
Trait implementation features:
- Implement the
embedded-hal@1.0.0-rc.x
traits (and friends) - Implement the
embedded-io
traits where able - Implement the
ufmt_write::Write
trait where able
- Implement the
- embedded-io async? defmt?
-
Enables embedded-io
- ufmt = ufmt-write
- async = eh1, embassy-futures, embassy-sync, embedded-hal-async, embedded-io, embedded-io-async
-
Support for asynchronous operation, implementing traits from
embedded-hal-async
andembedded-io-async
Affects
dma::RxPrivate.waker
,dma::RxChannel.waker
,dma::TxPrivate.waker
,dma::TxChannel.waker
,i2s::asynch
,parl_io::asynch
,rmt::asynch
… - embassy embassy-executor-interrupt? embassy-executor-thread? = embassy-time-driver
-
Embassy support
Enables embassy of esp-hal-procmacros ^0.8.0
Affects
esp-hal-common::embassy
… - embassy-executor-interrupt = embassy, embassy-executor
-
Affects
executor::interrupt
,embassy::executor
… - embassy-executor-thread = embassy, embassy-executor
-
Affects
executor::thread
,embassy::executor
… - embassy-integrated-timers
-
Enables integrated-timers of optional embassy-executor ^0.5.0
embassy-executor:
Use the executor-integrated
embassy-time
timer queue. - embassy-time-systick embassy-time-timg0
- riscv esp32c2? esp32c3? esp32c6? esp32h2?
-
Architecture-specific features (intended for internal use)
Enables restore-state-u8 of critical-section and riscv ^0.11.0
RISC-V
- xtensa esp32? esp32s2? esp32s3?
-
Enables restore-state-u32 of critical-section
- rv-init-data
-
Initialize / clear data sections and RTC memory
Enables init-data and init-rw-text of esp-riscv-rt ^0.6.1
- rv-zero-rtc-bss
-
Enables zero-rtc-fast-bss of esp-riscv-rt ^0.6.1
- rv-init-rtc-data
-
Enables init-rtc-fast-data and init-rtc-fast-text of esp-riscv-rt ^0.6.1
- debug
-
Enable the
impl-register-debug
feature for the selected PACEnables impl-register-debug of optional esp32 ^0.28.0, optional esp32c2 ^0.17.0, optional esp32c3 ^0.20.0, optional esp32c6 ^0.11.0, optional esp32h2 ^0.7.0, optional esp32s2 ^0.19.0, and optional esp32s3 ^0.23.0
- defmt
-
Enable support for
defmt
, foresp-hal-common
and also for all our dependenciesEnables defmt =0.3.5, defmt of optional embassy-executor ^0.5.0, optional embassy-futures, and optional embassy-sync ^0.5.0, defmt-03 of embedded-io, optional embedded-hal, and optional embedded-io-async
Features from optional dependencies
In crates that don't use the dep:
syntax, optional dependencies automatically become Cargo features. These features may have been created by mistake, and this functionality may be removed in the future.
- embedded-can eh1?
- embedded-hal-1 eh1?
-
Enables embedded-hal
- embedded-hal-nb eh1?
- esp-synopsys-usb-otg usb-otg?
- usb-device usb-otg?
- embedded-hal-async async?
-
Enables embedded-hal-async
async
- embedded-io-async async?
- embassy-executor embassy-executor-interrupt? embassy-executor-thread?
-
Enables embassy-executor ^0.5.0
- embassy-futures async?
- embassy-sync async?
-
Enables embassy-sync ^0.5.0
- embassy-time-driver embassy?
- esp-riscv-rt direct-vectoring? flip-link? interrupt-preemption? rt-riscv? rv-init-data? rv-init-rtc-data? rv-zero-rtc-bss?
-
Enables esp-riscv-rt ^0.6.1
- xtensa-lx esp32? esp32s2? esp32s3?
-
Enables xtensa-lx ^0.8.0
- ufmt-write ufmt?
-
Enables ufmt-write
Part of
ufmt
containing onlyuWrite
trait