2 unstable releases
new 0.4.0 | Nov 7, 2024 |
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0.3.0 | Oct 20, 2024 |
#32 in #crc
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8KB
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crc16-genibus-fast
SIMD implementation of CRC-16/GENIBUS (CRC-16/DARC CRC-16/EPC CRC-16/EPC-C1G2 CRC-16/I-CODE), with table and loop fallbacks.
This crate was generated by crc-fast-rs.
Principle of operation
TL;DR: uses SIMD if available, otherwise falls back seamlessly to a lookup table algorithm.
- If using
hash
, will use SIMD if the CPU is capable- x86-64 CPU:s with the following CPU flags are supported (runtime detection):
pclmulqdq
sse4.1
- aarch64 CPU:s with the following CPU flags are supported:
nano
aes
- IMPORTANT: aarch64 does not use runtime feature detection and has to be built with a compatible target-cpu to use SIMD, unlike x86-64.
- x86-64 CPU:s with the following CPU flags are supported (runtime detection):
- If using
hash
with an incompatible CPU the fallback algorithm will be invoked. If thetable-fallback
feature is active the fallback is based on a lookup table, otherwise a simple loop (slowest option). Deactivatingtable-fallback
(default enabled) can be useful when memory is very scarce, as the lookup table requires a small amount of extra RAM. - If
table-fallback
feature is enabled, it can be manually invoked byhash_table
(not recommended in the typical case). - Similarly,
hash_simple
can be used to force the loop algorithm (also not recommended in the typical case).
Usage
let res: u32 = crc16_genibus_fast::hash(&my_binary_slice);
There is no "update"-like functionality yet, since doing this with arbitrarily lengths can be tricky with SIMD and destroy performance.
Dependencies
~37KB